Realization of FIR Filter using Distributed Arithmetic Architecture

Chandan Singh¹

Section:Research Paper, Product Type: Isroset-Journal
Vol.3 , Issue.4 , pp.7-12, Jul-2015

Online published on Sep 08, 2015

Copyright © Chandan Singh . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
 

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Abstract :
This work represents an efficient implementation of Finite Impulse response (FIR) filter using Distributed Arithmetic (DA) architecture. Distributed Arithmetic (DA) architecture is an efficient technique for calculation of inner product or multiply and accumulate (MAC) using Look-up tables. In absence of DA, the direct method of implementing MAC uses dedicated multipliers which are fast but consume considerable hardware. MAC operation is common in digital signal processing algorithms. Here DA replaces the explicit multiplications by ROM look-up tables which is an efficient technique to implement on FPGA. To save the memory units, we have divided the look-up tables. Area saving from using DA can be up to 80% in DSP hardware design. This work shows the implementation of an eight order FIR filter using DA architecture through VHDL coding and the code is finally simulated using Modelsim and then compared with MATLAB output.

Key-Words / Index Term :
Distributed Arithmetic (DA) architecture, VHDL. MATLAB, FIR Filter

References :
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[2]. Yajun Zhou ; Sch. of Autom., HangZhou Dianzi Univ., Hangzhou, China ; Pingzheng Shi “Distributed Arithmetic for FIR Filter implementation on FPGA” IEEE 2011 International Conference on Multimedia Technology (ICMT), pp 294 - 297July 2011 Print ISBN: 978-1-61284-771-9, DOI: 10.1109/ICMT.2011.6003032
[3]. Sang Yoon Park, Pramod Kumar Meher “Low-Power, High-Throughput, and Low-Area Adaptive FIR Filter Based on Distributed Arithmetic” IEEE Transactions on circuits and systems-II: Express briefs, Vol. 60, N0. 6, pp. 346-350 June 2013.
[4]. M Surya Prakash, Rafi Ahamed Shaik “Low-Area & High-Throughput Architecture for an Adaptive filter using Distributed Arithmetic” IEEE Transaction on Circuit & System, Vol. 60, No. 11, pp. 781-785, Nov. 2013