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Histogram Computations on GPUs Kernel using Global and Shared Memory Atomics
C. P. Patidar1 , Meena Sharma2
Section:Research Paper, Product Type: Isroset-Journal
Vol.1 ,
Issue.4 , pp.1-6, Jul-2013
Online published on Aug 31, 2013
Copyright © C. P. Patidar , Meena Sharma . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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IEEE Style Citation: C. P. Patidar , Meena Sharma, “Histogram Computations on GPUs Kernel using Global and Shared Memory Atomics,” International Journal of Scientific Research in Computer Science and Engineering, Vol.1, Issue.4, pp.1-6, 2013.
MLA Style Citation: C. P. Patidar , Meena Sharma "Histogram Computations on GPUs Kernel using Global and Shared Memory Atomics." International Journal of Scientific Research in Computer Science and Engineering 1.4 (2013): 1-6.
APA Style Citation: C. P. Patidar , Meena Sharma, (2013). Histogram Computations on GPUs Kernel using Global and Shared Memory Atomics. International Journal of Scientific Research in Computer Science and Engineering, 1(4), 1-6.
BibTex Style Citation:
@article{Patidar_2013,
author = {C. P. Patidar , Meena Sharma},
title = {Histogram Computations on GPUs Kernel using Global and Shared Memory Atomics},
journal = {International Journal of Scientific Research in Computer Science and Engineering},
issue_date = {7 2013},
volume = {1},
Issue = {4},
month = {7},
year = {2013},
issn = {2347-2693},
pages = {1-6},
url = {https://www.isroset.org/journal/IJSRCSE/full_paper_view.php?paper_id=64},
publisher = {IJCSE, Indore, INDIA},
}
RIS Style Citation:
TY - JOUR
UR - https://www.isroset.org/journal/IJSRCSE/full_paper_view.php?paper_id=64
TI - Histogram Computations on GPUs Kernel using Global and Shared Memory Atomics
T2 - International Journal of Scientific Research in Computer Science and Engineering
AU - C. P. Patidar , Meena Sharma
PY - 2013
DA - 2013/08/31
PB - IJCSE, Indore, INDIA
SP - 1-6
IS - 4
VL - 1
SN - 2347-2693
ER -
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Abstract :
In this paper we implement histogram computations on a Graphics Processing Unit (GPU). Our Histogram computations is implemented using compute unified device architecture (CUDA) which is a minimal extension to C/C++. In this development Histogram computations, computed on GPU’s global memory as well as on shared memory. We also perform Histogram computations on CPU and consider it as a baseline performance. Experimental results demonstrate that shared memory in GPU gives seven times speedup over our baseline CPU.
Key-Words / Index Term :
GPUs, Histograms, CUDA, Global Memory, Shared Memory
References :
[1]. J. D. Owens, D. Luebke, N. Govindaraju, M. Harris, J. KrÄuger, A. E. Lefohn, and T. Pur- cell, “A Survey of General-Purpose Computation on Graphics Hardware," Computer Graphics Forum, vol. 26, pp. 80-113, Mar. 2007.
[2]. NVIDIA Corporation, CUDA: Compute Unified Device Architecture Programming Guide," tech. rep., NVIDIA, 2007.
[3]. S. Sengupta, M. Harris, Y. Zhang, and J. D. Owens, “Scan Primitives for GPU Computing,"inGH '07: Proceedings of the 22nd ACSIGGRAPH/EUROGRAPHICS Symposium onGraphics Hardware, Switzerland, Eurographics Association, 2007, pp. 97-106.
[4]. M. Harris, J. Owens, S. Sengupta, Y. Zhang, and A. Davidson. “CUDPP: CUDA Data Parallel Primitives Library".
[5]. P. Harish and P. Narayanan, “Accelerating Large Graph Algorithms on the GPU Using CUDA" in High Performance Computing HiPC 2007, pp. 197-208.
[6]. H. Nguyen, GPU Gems 3. Addison-Wesley Professional, 2007.
[7]. Y. Luo and R. Duraiswami, “Canny Edge Detection on Nvidia CUDA" in Proc. of IEEE Computer Vision and Pattern Recognition, 2008, pp. 1-8.
[8]. V. Podlozhnyuk, “64-bin histogram”, NVIDIA, Tech. Rep., 2007.
[9]. K. H. Knuth, “Optimal data-based binning for histograms,” ArXiv Physics e-prints, May 2006.
[10]. Compute Unified Device Architecture (CUDA) Programming Guide.
[11]. NVIDIA. CUDA Compute Unified Device Architecture Programming Guide 2.0, July 2008.
[12]. C. Ling, K. Benkrid, and T. Hamada, “A parameterisable and scalable smith-waterman algorithm implementation on cuda- compatible gpus,” Application Specific Processors, 2009. SASP ’09. IEEE 7th Symposium on, pp. 94–100, jul. 2009
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